LMT LM – Monolithic Triple NS CRT Driver, Package: to , Pin Nb=9. The is an integrated high voltage CRT driver circuit designed for use in. Download National Semiconductor Corporation LMT pdf datasheet file. LMT Datasheet PDF Download – Monolithic Triple ns CRT Driver, LMT data sheet.
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The designer should note that if the load capacitance.
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This corresponds to a speed degrada- tion of 0. Ferrite core inductors from J. Semiconductor Application Note Note that the components are placed so that they almost line up from the output pin of the LM to the blue cathode pin of the CRT connector.
The schematic of the board is shown in Figure The IC is packaged in an industry standard 9-lead TO Note that the components are placed so. The fall time shows a. Used in conjunction with an LM, a complete video chan.
This example assumes a capacitive load of 8 pF and no re- sistive load. Once the optimum values are determined the variable resistors can be replaced with fixed values. This is done to. This board provides a good example of a layout that can be used as a guide for future layouts. See Thermal Considerations section. Figure 6 shows the maximum power dissipation of the. This resistor can be used to help control overshoot.
Used in conjunction with an LM, a complete video chan- nel from monitor input to CRT cathode can be achieved. For optimum performance, an adequate ground plane, isola. Increasing the values of R1. Because of its high small signal bandwidth, the part may os.
The val- ues shown in Figure 9 can be used as a good starting point for the evaluation of the LM Very important for arc protection. The LM case temperature must datasheey maintained below. Figure 6 shows the maximum power dissipation of the LM vs Frequency when all three channels of the device are driving an 8 pF load with a 40 V p-p alternating one pixel on, one pixel off signal. Note also that D14, D15, R29 and D13 are placed to minimize the size of the video nodes that they are attached to.
This board provides a good. Schematic and Connection Diagrams. To prevent this, leads to the video amplifier input circuit should be shielded, and input cir- cuit wiring should be spaced as far as possible from output circuit wiring.
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The following references are recommended: Figure 10 is the sche. Increasing the value of L1 will speed up the circuit as. A typical application of the LM is shown in Figure This graph gives the designer the information needed to determine the heat sink requirement for the appli- cation.
The diode placement and routing is very important for minimizing the voltage 5 www. This minimizes parasitic capacitance in the. Increasing the values of R1 and R2 will slow the circuit down while decreasing over- shoot.
This demonstrates the importance. This is done to datasheeh the length of the video path between these two components.
Figure 8 shows the effect of increased load capacitance on. Figure 7 shows the variation in rise and fall times when the. Because of its high small signal bandwidth, the part may os- cillate in a monitor if feedback occurs around the video chan- nel through the chassis wiring.
The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase.
Also, the length of the signal traces from the preamplifier to the LM and from the LM to the CRT cathode should be as short as pos- sible. It is very important to use induc- tors with very high self-resonant frequencies, preferably above MHz.
This graph gives the designer the information. This example assumes a capacitive load of 8 pF and no re. The anode of protection diode D14 is con- nected directly fatasheet a section of the the ground plane that has a short and direct path to the LM ground pins. Note the location of the following components: This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the pro- tection diodes. Using vari- able resistors for R1 and the parallel resistor will simplify finding the values needed for optimum performance in a given application.
Figure 12 shows the routing and component placement from pin 1 of the LM to the blue cathode. Figure 11 shows routing and component placement on the. The rise time shows a maximum variation relative to the cen.